sed1355 ETC-unknow, sed1355 Datasheet - Page 502

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 10
3 SED1355 Host Bus Interface
3.1 Host Bus Interface Pin Mapping
SED1355
X23A-G-012-01
Note
Note
The SED1355 directly supports multiple processors. The SED1355 implements a 16-bit
PC Card (PCMCIA) Host Bus Interface which is most suitable for direct connection to the
V832 microprocessor.
The PC Card host bus interface is selected by the SED1355 on the rising edge of RESET#.
After releasing reset the bus interface signals assume their selected configuration. For
details on SED1355 configuration, see Section 4.2, “SED1355 Hardware Configuration”
on page 13.
The following table shows the functions of each host bus interface signal.
At reset, the Host Interface Disable bit in the Miscellaneous Disable Register
(REG[1Bh] bit 7) is set to 1. This means that only REG[1Ah] (read-only) and
REG[1Bh] are accessible until a write to REG[1Bh] sets bit 7 to 0 making all regis-
ters accessible. When debugging a new hardware design, this can sometimes give the
appearance that the interface is not working, so it is important to remember to clear this
bit before proceeding with debugging.
1
The bus signal A0 is not used by the SED1355 internally.
SED1355 Pin Name
Table 3-1: Host Bus Interface Pin Mapping
BUSCLK
AB[20:1]
DB[15:0]
RD/WR#
RESET#
WAIT#
WE1#
WE0#
M/R#
RD#
CS#
BS#
A0
Connected to VDD (+3.3V)
connected to system reset
CS3, CS4, CS5 or CS6
NEC V832 Pin Name
SDCLKOUT
READY
LUBEN
A[20:1]
D[15:0]
LLBEN
GND
IOWR
IORD
A21
1
Interfacing to the NEC V832™ Microprocessor
Epson Research and Development
Vancouver Design Center
Issue Date: 99/05/05