sed1355 ETC-unknow, sed1355 Datasheet - Page 65

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 99/05/18
Symbol
t13
t10
t11
t12
t14
t15
t9
t1
t2
t3
t4
t5
t6
t7
t8
1
2
Clock period
Clock pulse width low
Clock pulse width high
ADDR[12:0] setup to first CLK of cycle
ADDR[12:0] hold from command invalid
ADDR[12:0] setup to falling edge ALE
ADDR[12:0] hold from falling edge ALE
CARDREG* hold from command invalid
Falling edge of chip select to CARDxWAIT* driven
Command invalid to CARDxWAIT* tri-state
D[31:16] valid to first CLK of cycle (write cycle)
D[31:16] hold from rising edge of CARDxWAIT*
Chip select to D[31:16] driven (read cycle)
D[31:16] setup to rising edge CARDxWAIT* (read cycle)
Command invalid to D[31:16] tri-state (read cycle)
1.
2.
If the SED1355 host interface is disabled, the timing for CARDxWAIT* driven is relative to
the falling edge of chip select or the second positive edge of DCLKOUT after ADDR[12:0]
becomes valid, whichever one is later.
If the SED1355 host interface is disabled, the timing for D[31:16] driven is relative to the
falling edge of chip select or the second positive edge of DCLKOUT after ADDR[12:0] be-
comes valid, whichever one is later.
Parameter
Table 7-10: Toshiba Timing
13.3
Min
5.4
5.4
10
10
10
0
5
0
0
5
0
1
0
5
3.0V
Max
15
25
25
13.3
Min
5.4
5.4
2.5
2.5
10
10
10
0
5
0
0
0
1
0
5.0V
Max
10
10
9
X23A-A-001-11
SED1355
Units
Page 59
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns