sed1355 ETC-unknow, sed1355 Datasheet - Page 346

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 16
6.13 CPU/Bus Interface Header Strips
6.14 Schematic Notes
SED1355
X23A-G-004-04
Note
All of the CPU/Bus interface pins of the SED1355 are connected to the header strips H1 and H2 for
easy interface to a CPU, or bus other than ISA.
Refer to Table 4-1 “CPU/BUS Connector (H1) Pinout” on page 10 and Table 4-2 “CPU/BUS
Connector (H2) Pinout” on page 11 for specific settings.
The following schematics are for reference only and may not reflect actual implementation. Please
request updated information before starting any hardware design.
These headers only provide the CPU/Bus interface signals from the SED1355. When another
host bus interface is selected through [MD3:1] configuration, appropriate external decode logic
MUST be used to access the SED1355. See the section “Host Bus Interface Pin Mapping” of the
SED1355 Hardware Functional Specification, document number X23A-A-001-xx.
SDU1355B0C Rev. 1.0 ISA Bus Evaluation Board User Manual
Epson Research and Development
Vancouver Design Center
Issue Date: 98/10/30