sed1355 ETC-unknow, sed1355 Datasheet - Page 32

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sed1355

Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet

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BUSCLK
BS#
RD/WR#
Page 26
SED1355
X23A-A-001-11
Pin Name
I
I
I
Type
13
6
10
Pin #
C
CS
CS
Table 5-1: Host Interface Pin Descriptions (Continued)
Cell
Hi-Z
Hi-Z
Hi-Z
RESET#
State
This pin inputs the system bus clock. It is possible to apply a 2x clock
and divide it by 2 internally - see MD12 in Summary of Configuration
Options .
• For SH-3/SH-4 Bus, this pin is connected to CKIO.
• For MC68K Bus 1, this pin is connected to CLK.
• For MC68K Bus 2, this pin is connected to CLK.
• For Generic Bus, this pin is connected to BCLK.
• For MIPS/ISA Bus, this pin is connected to CLK.
• For Philips PR31500/31700 Bus, this pin is connected to DCLKOUT.
• For Toshiba TX3912 Bus, this pin is connected to DCLKOUT.
• For PowerPC Bus, this pin is connected to CLKOUT.
• For PC Card (PCMCIA) Bus, this pin is connected to CLKI.
See “Host Bus Interface Pin Mapping” for summary. See the respective
AC Timing diagram for detailed functionality.
This is a multi-purpose pin:
• For SH-3/SH-4 Bus, this pin inputs the bus start signal (BS#).
• For MC68K Bus 1, this pin inputs the address strobe (AS#).
• For MC68K Bus 2, this pin inputs the address strobe (AS#).
• For Generic Bus, this pin is connected to V
• For MIPS/ISA Bus, this pin is connected to V
• For Philips PR31500/31700 Bus, this pin is connected to V
• For Toshiba TX3912 Bus, this pin is connected to V
• For PowerPC Bus, this pin inputs the Transfer Start signal (TS#).
• For PC Card (PCMCIA) Bus, this pin is connected to V
See “Host Bus Interface Pin Mapping” for summary. See the respective
AC Timing diagram for detailed functionality.
This is a multi-purpose pin:
• For SH-3/SH-4 Bus, this pin inputs the read write signal (RD/WR#).
• For MC68K Bus 1, this pin inputs the read write signal (R/W#).
• For MC68K Bus 2, this pin inputs the read write signal (R/W#).
• For Generic Bus, this pin inputs the read command for the upper
• For MIPS/ISA Bus, this pin is connected to V
• For Philips PR31500/31700 Bus, this pin inputs the even byte access
• For Toshiba TX3912 Bus, this pin inputs the even byte access enable
• For PowerPC Bus, this pin inputs the read write signal (RD/WR#).
• For PC Card (PCMCIA) Bus, this pin inputs the card enable 1 signal
See “Host Bus Interface Pin Mapping” for summary. See the respective
AC Timing diagram for detailed functionality.
The SED1355 needs this signal for early decode of the bus cycle.
data byte (RD1#).
enable signal (/CARDxCSL).
signal (CARDxCSL*).
(-CE1).
Description
Epson Research and Development
Hardware Functional Specification
DD
DD
DD
Vancouver Design Center
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.
.
Issue Date: 99/05/18
DD
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DD
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DD
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