sed1355 ETC-unknow, sed1355 Datasheet - Page 114

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sed1355

Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet

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Page 108
SED1355
X23A-A-001-11
bits 4-2
bit 1
bit 0
Bit-per-pixel Select Bits [2:0]
Note
Bit-per-pixel Select Bits [2:0]
These bits select the color depth (bpp) for the displayed data. See “Section 10.1 Display Mode For-
mats” for details of how the pixels are mapped into the image buffer.
CRT Enable
This bit enables the CRT monitor.
When this bit = 1, the CRT is enabled.
When this bit = 0, the CRT is disabled.
LCD Enable
This bit enables the LCD panel.
Programming this bit from a 0 to a 1 starts the LCD power-on sequence.
Programming this bit from a 1 to a 0 starts the LCD power-off sequence.
1. Dual Panel Considerations: When configured for a dual LCD panel and using
2. The Line doubling option is not supported with dual panel.
110
Simultaneous Display, the Half Frame Buffer Disable, REG[1Bh] bit 0, must be set to 1.
This results in a lower contrast on the LCD panel, which may require adjustment.
000
001
010
011
100
101
111
Table 8-7: Bit-per-pixel Selection
Color Depth (bpp)
Reserved
15 bpp
16 bpp
1 bpp
2 bpp
4 bpp
8 bpp
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 99/05/18

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