sed1355 ETC-unknow, sed1355 Datasheet - Page 31

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

DB[15:0]
WE1#
M/R#
CS#
Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 99/05/18
Pin Name
IO
IO
I
I
Type
16-31
9
5
4
Pin #
C/TS2 Hi-Z
CS/TS
2
C
C
Table 5-1: Host Interface Pin Descriptions (Continued)
Cell
Hi-Z
Hi-Z
Hi-Z
RESET#
State
These pins are the system data bus. For 8-bit bus modes, unused data
pins should be tied to V
• For SH-3/SH-4 Bus, these pins are connected to D[15:0].
• For MC68K Bus 1, these pins are connected to D[15:0].
• For MC68K Bus 2, these pins are connected to D[31:16] for 32-bit
• For Generic Bus, these pins are connected to D[15:0].
• For MIPS/ISA Bus, these pins are connected to SD[15:0].
• For Philips PR31500/31700 Bus, these pins are connected to
• For Toshiba TX3912 Bus, pins [15:8] are connected to D[23:16] and
• For PowerPC Bus, these pins are connected to D[0:15].
• For PC Card (PCMCIA) Bus, these pins are connected to D[15:0].
See “Host Bus Interface Pin Mapping” for summary. See the respective
AC Timing diagram for detailed functionality.
This is a multi-purpose pin:
• For SH-3/SH-4 Bus, this pin inputs the write enable signal for the
• For MC68K Bus 1, this pin inputs the upper data strobe (UDS#).
• For MC68K Bus 2, this pin inputs the data strobe (DS#).
• For Generic Bus, this pin inputs the write enable signal for the upper
• For MIPS/ISA Bus, this pin inputs the system byte high enable signal
• For Philips PR31500/31700 Bus, this pin inputs the odd byte access
• For Toshiba TX3912 Bus, this pin inputs the odd byte access enable
• For PowerPC Bus, this pin outputs the burst inhibit signal (BI#).
• For PC Card (PCMCIA) Bus, this pin inputs the card enable 2 signal
See “Host Bus Interface Pin Mapping” for summary. See the respective
AC Timing diagram for detailed functionality.
• For Philips PR31500/31700 Bus, this pin is connected to V
• For Toshiba TX3912 Bus, this pin is connected to V
• For all other busses, this input pin is used to select between the
See Table 5-6:, “CPU Interface Pin Mapping,” on page 34.
• For Philips PR31500/31700 Bus, this pin is connected to V
• For Toshiba TX3912 Bus, this pin is connected to V
• For all other busses, this is the Chip Select input.
See Table 5-6:, “CPU Interface Pin Mapping,” on page 34. See the
respective AC Timing diagram for detailed functionality.
devices (e.g. MC68030) or D[15:0] for 16-bit devices (e.g.
MC68340).
D[31:16].
pins [7:0] are connected to D[31:24].
upper data byte (WE1#).
data byte (WE1#).
(SBHE#).
enable signal (/CARDxCSH).
signal (CARDxCSH*).
(-CE2).
display buffer and register address spaces of the SED1355. M/R# is
set high to access the display buffer and low to access the registers.
See Register Mapping .
DD
.
Description
DD
DD
.
.
X23A-A-001-11
DD
DD
SED1355
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