sed1355 ETC-unknow, sed1355 Datasheet - Page 104

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sed1355

Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet

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Page 98
7.5.11 CRT Timing
VDP
VNDP
HDP
HNDP
SED1355
X23A-A-001-11
RED,GREEN,BLUE
RED,GREEN,BLUE
Example Timing for 640x480 CRT
= Horizontal Non-Display Period
= Vertical Display Period
= Vertical Non-Display Period
= Horizontal Display Period
HRTC
VRTC
HRTC
LINE480
Note
The signals RED, GREEN and BLUE are analog signals from the embedded DAC and represent
the color components which make up each pixel.
HNDP
VNDP
1
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
= (REG[0Ah] bits [5:0]) + 1
= ((REG[04h] bits [6:0]) + 1)*8Ts
= HNDP
Figure 7-44: CRT Timing
1
1-1
+ HNDP
1-2
2
LINE1
HDP
= ((REG[05h] bits [4:0]) + 1)*8Ts
VDP
1-640
LINE480
HNDP
Epson Research and Development
Hardware Functional Specification
2
Vancouver Design Center
Issue Date: 99/05/18

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