sed1355 ETC-unknow, sed1355 Datasheet - Page 503

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
3.2 Host Bus Interface Signal Descriptions
Interfacing to the NEC V832™ Microprocessor
Issue Date: 99/05/05
The SED1355 PC Card Host Bus Interface requires the following signals.
• BUSCLK is a clock input which is required by the SED1355 Host Bus Interface. It is
• The address inputs AB[20:0], and the data bus DB[15:0], connect directly to the V832
• M/R# (memory/register) selects between memory or register access. It may be
• Chip Select (CS#) must be driven low by CSx (where x is the V832 chip select used)
• WE1# and RD/WR# connect to LUBEN and LLBEN (the byte enables for the high-
• RD# connects to IORD (the read enable signal from the V832).
• WE0# connects to IOWR (the write enable signal from the V832).
• WAIT# is a signal output from the SED1355 that indicates the V832 must wait until
• The Bus Start (BS#) signal is not used for the PC Card Host Bus Interface and should be
• The RESET# (active low) input of the SED1355 may be connected to the system
driven by the V832 signal SDCLKOUT.
address (A[20:0]) and data bus (D[15:0]), respectively. MD4 must be set to select little
endian mode upon reset.
connected to an address line, allowing system address A21 to be connected to the M/R#
line.
whenever the SED1355 is accessed by the V832.
order and low-order bytes). They are driven low when the V832 is accessing the
SED1355.
data is ready (read cycle) or accepted (write cycle) on the host bus. Since V832 accesses
to the SED1355 may occur asynchronously to the display update, it is possible that
contention may occur in accessing the SED1355 internal registers and/or display buffer.
The WAIT# line resolves these contentions by forcing the host to wait until the resource
arbitration is complete. For V832 applications, this signal should be set active low using
the MD5 configuration input.
tied high (connected to V
RESET.
DD
).
X23A-G-012-01
SED1355
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