sed1355 ETC-unknow, sed1355 Datasheet - Page 111

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
REG[08h] bits 7-0
REG[09h] bits 1-0
bit 7
bits 5-0
Hardware Functional Specification
Issue Date: 99/05/18
Vertical Display Height Register 0
REG[08h]
Vertical
Display
Height Bit 7
Vertical Display Height Register 1
REG[09h]
n/a
Vertical Non-Display Period Register
REG[0Ah]
Vertical Non-
Display
Period Status
(RO)
Vertical
Display
Height Bit 6
n/a
n/a
Note
• For CRT, TFT/D-TFD, and single passive LCD panel this register is programmed to:
• For dual-panel passive LCD not in simultaneous display mode, this register is programmed to:
• For all simultaneous display modes, this register is programmed to:
Vertical Display Height Bits [9:0]
These bits specify the vertical display height.
Vertical display height (lines) = Vertical Display Height Bits [9:0] + 1
Vertical Non-Display Period Status
This is a read-only status bit.
When this bit = 1, a vertical non-display period is indicated.
When this bit = 0, a vertical display period is indicated.
Vertical Non-Display Period Bits [5:0]
These bits specify the vertical non-display period.
Vertical non-display period (lines) = Vertical Non-Display Period Bits [5:0] + 1
(vertical resolution of the display) - 1 , e.g. EFh for a 240-line display.
((vertical resolution of the display)/2) - 1 , e.g. EFh for a 480-line display.
(vertical resolution of the CRT) - 1 , e.g. 1DFh for a 480-line CRT.
This register must be programmed such that
REG[0Ah]
Vertical
Display
Height Bit 5
n/a
Vertical Non-
Display
Period Bit 5
1 and (REG[0Ah] bits [5:0] + 1)
Vertical
Display
Height Bit 4
n/a
Vertical Non-
Display
Period Bit 4
Vertical
Display
Height Bit 3
n/a
Vertical Non-
Display
Period Bit 3
(REG[0Bh] + 1) + (REG[0Ch] bits [2:0] + 1)
Vertical
Display
Height Bit 2
n/a
Vertical Non-
Display
Period Bit 2
Vertical
Display
Height Bit 1
Vertical
Display
Height Bit 9
Vertical Non-
Display
Period Bit 1
Vertical
Display
Height Bit 0
Vertical
Display
Height Bit 8
Vertical Non-
Display
Period Bit 0
X23A-A-001-11
SED1355
Page 105
RW
RW
RW