sed1355 ETC-unknow, sed1355 Datasheet - Page 344

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 14
6.3 DRAM Support
6.4 Decode Logic
6.5 Clock Input Support
6.6 Monochrome LCD Panel Support
6.7 Color Passive LCD Panel Support
SED1355
X23A-G-004-04
The SED1355 supports 256K x 16 as well as 1M x 16 FPM/EDO-DRAM in symmetrical and
asymmetrical formats.
The SDU1355B0C board supports a 5.0V 1M x 16 symmetrical EDO-DRAM (42-pin SOJ package).
This provides a 2M byte display buffer.
This board utilizes the MIPS/ISA Interface of the SED1355 (see the SED1355 Hardware Functional
Specification, document number X23A-A-001-xx).
All required decode logic is provided through a 22V10 PAL (U4, socketed).
The SED1355 supports up to a 40.0Mhz input clock frequency. A 40.0MHz oscillator (U2, socketed)
is provided on the SDU1355 board as the clock (CLKI) source.
The SED1355 supports 4 and 8-bit, dual and single, monochrome passive LCD panels. All necessary
signals are provided on the 40-pin ribbon cable header J6. The interface signals on the cable are alter-
nated with grounds to reduce crosstalk and noise.
Refer to Table 3-1 “LCD Signal Connector (J6)” on page 9 for connection information.
The SED1355 directly supports 4, 8 and 16-bit, dual and single, color passive LCD panels. All the
necessary signals are provided on the 40-pin ribbon cable header J6. The interface signals on the
cable are alternated with grounds to reduce crosstalk and noise.
Refer to Table 3-1 “LCD Signal Connector (J6)” on page 9 for connection information.
SDU1355B0C Rev. 1.0 ISA Bus Evaluation Board User Manual
Epson Research and Development
Vancouver Design Center
Issue Date: 98/10/30