sed1355 ETC-unknow, sed1355 Datasheet - Page 26

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sed1355

Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet

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Page 20
4 Internal Description
4.1 Block Diagram Showing Datapaths
4.2 Block Descriptions
4.2.1 Register
4.2.2 Host Interface
4.2.3 CPU R/W
SED1355
X23A-A-001-11
CPU/MPU
Register
Host
I/F
The Register block contains all the register latches
The Host Interface (I/F) block provides the means for the CPU/MPU to communicate with the
display buffer and internal registers via one of the supported bus interfaces.
The CPU R/W block synchronizes the CPU requests for display buffer access. If SwivelView is
enabled, the data is rotated in this block.
Clocks
16-bit FPM/EDO-DRAM
R/W
CPU
Power Save
Memory
Controller
Display
Cursor
FIFO
FIFO
Look-
Up
Tables
CRTC
Epson Research and Development
Hardware Functional Specification
LCD
DAC
Vancouver Design Center
I/F
Issue Date: 99/05/18
LCD
CRT

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