sed1355 ETC-unknow, sed1355 Datasheet - Page 119

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
bit 0
8.2.7 Miscellaneous Registers
bit 7
bit 0
REG[1Ch] bits 7-0
REG[1Dh] bits 7-0
Hardware Functional Specification
Issue Date: 99/05/18
Miscellaneous Register
REG[1Bh]
Host
Interface
Disable
MD Configuration Readback Register 0
REG[1Ch]
MD[7] Status
MD Configuration Readback Register 1
REG[1Dh]
MD[15]
Status
n/a
MD[6] Status
MD[14]
Status
Software Suspend Mode Enable
When this bit = 1 software Suspend mode is enabled.
When this bit = 0 software Suspend mode is disabled.
See Section 15 Power Save Modes for details.
Host Interface Disable
This bit is set to 1 during power-on/reset.
This bit must be programmed to 0 to enable the Host Interface. When this bit is high, all memory
and all registers except REG[1Ah] (read-only) and REG[1Bh] are inaccessible.
Half Frame Buffer Disable
This bit is used to disable the Half Frame Buffer.
When this bit = 1, the Half Frame Buffer is disabled.
When this bit = 0, the Half Frame Buffer is enabled.
When a single panel is selected, the Half Frame Buffer is automatically disabled and this bit has no
effect.
The half frame buffer is needed to fully support dual panels. Disabling the Half Frame Buffer
reduces memory bandwidth requirements and increases the supportable pixel clock frequency, but
results in reduced contrast on the LCD panel (the duty cycle of the LCD is halved). This mode is
not normally used except under special circumstances such as simultaneous display on a CRT and
dual panel LCD. When this mode is used the Alternate Frame Rate Modulation scheme should be
used (see REG[31h]). For details on Frame Rate calculation see Section 14.2, “Frame Rate Calcu-
lation” on page 142.
MD[15:0] Configuration Status
These are read-only status bits for the MD[15:0] pins configuration status at the rising edge of
RESET#. MD[15:0] are used to configure the chip at the rising edge of RESET# – see Pin Descrip-
tions and Summary of Configuration Options for details.
n/a
MD[5] Status
MD[13]
Status
n/a
MD[4] Status
MD[12]
Status
n/a
MD[3] Status
MD[11]
Status
n/a
MD[2] Status
MD[10]
Status
n/a
MD[1] Status
MD[9]
Status
Half Frame
Buffer Disable
MD[0] Status
MD[8]
Status
X23A-A-001-11
SED1355
Page 113
RW
RO
RO