sed1355 ETC-unknow, sed1355 Datasheet - Page 197

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
9 CRT Considerations
9.1 Introduction
9.1.1 CRT Only
9.1.2 Simultaneous Display
Programming Notes and Examples
Issue Date: 99/04/27
The SED1355 is capable of driving either an LCD panel, or a CRT display, or both simultaneously.
As display devices, panels tend to be lax in their horizontal and vertical timing requirements. CRT
displays often cannot vary by more than a very small percentage in their timing requirements before
the image is degraded.
Central to the following sections are VESA timings. Rather than fill this section of the guide with
pages full of register values it is recommended that the program 1355CFG.EXE be used to generate
a header file with the appropriate values. For more information on VESA timings contact the Video
Electronics Standards association on the world-wide web at www.vesa.org.
All CRT output should meet VESA timing specifications. The VESA specification details all the
parameters of the display and non-display times as well as the input clock required to meet the times.
Given a proper VESA input clock the configuration program 1355CFG.EXE will generate correct
VESA timings for 640x480 and for 800x600 modes.
As mentioned in the previous section, CRT timings should always comply to the VESA specifi-
cation. This requirement implies that during simultaneous operation the timing must still be VESA
compliant. For most panels, being run at CRT frequencies is not a problem. One side effect of
running with these usually slower timings will be a flicker on the panel.
One limitation of simultaneous display is that should a dual panel be the second display device the
half frame buffer must be disabled for correct operation.
X23A-G-003-05
SED1355
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