sed1355 ETC-unknow, sed1355 Datasheet - Page 126

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Page 120
8.2.9 Ink/Cursor Registers
bit 7-6
bit 3-0
REG[29] bit 7
REG[28] bits 7-0
REG[29] bits 1-0
SED1355
X23A-A-001-11
Ink/Cursor Control Register
REG[27h]
Ink/Cursor
Mode
Bit 1
Cursor X Position Register 0
REG[28h]
Cursor X
Position Bit 7
Cursor X Position Register 1
REG[29h]
Reserved
Ink/Cursor
Mode
Bit 0
Cursor X
Position Bit 6
n/a
Note
Ink/Cursor Control Bits [1:0]
These bits select the operating mode of the Ink/Cursor circuitry. See table below
Ink/Cursor FIFO Threshold Bits [3:0]
These bits specify the Ink/Cursor FIFO depth required to sustain uninterrupted display fetches.
When these bits are all 0, the Ink/Cursor FIFO depth is calculated automatically.
Reserved
This bit must be set to 0.
Cursor X Position Bits [9:0]
In Cursor mode, this 10-bit register is used to program the horizontal pixel position of the Cursor’s
top left pixel.
This register must be set to 0 in Ink mode.
The Cursor X Position register must be set during VNDP (vertical non-display period). Check
the VNDP status bit (REG[0Ah] bit 7) to determine if you are in VNDP, then update the register.
n/a
Cursor X
Position Bit 5
n/a
Bit 7
0
0
1
1
REG[27h]
n/a
Table 8-17: Ink/Cursor Selection
Cursor X
Position Bit 4
n/a
Bit 6
0
1
0
1
Cursor High
Threshold
Bit 3
Cursor X
Position Bit 3
n/a
Operating Mode
reserved
inactive
Cursor
Cursor High
Threshold
Bit 2
Cursor X
Position Bit 2
n/a
Ink
Epson Research and Development
Cursor High
Threshold
Bit 1
Cursor X
Position Bit 1
Cursor X
Position Bit 9
Hardware Functional Specification
Vancouver Design Center
Issue Date: 99/05/18
Cursor High
Threshold
Bit 0
Cursor X
Position Bit 0
Cursor X
Position Bit 8
RW
RW
RW