sed1355 ETC-unknow, sed1355 Datasheet - Page 343

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
6 Technical Description
6.1 ISA Bus Support
6.2 Non-ISA Bus Support
SDU1355B0C Rev. 1.0 ISA Bus Evaluation Board User Manual
Issue Date: 98/10/30
Note
Note
The SDU1355B0C directly supports the 16-bit ISA bus environment. All the configuration options
[MD15:0] are either hard-wired or selectable through the eight-position DIP Switch S1. Refer to
Table 2-1 “Configuration DIP Switch Settings” on page 8 for details.
This evaluation board is specifically designed to support the standard 16-bit ISA bus. However, the
SED1355 directly supports many other host bus interfaces. Header strips H1 and H2 have been
provided and contain all the necessary I/O pins to interface to these buses. See, Section 4 “CPU/Bus
Interface Connector Pinouts” on page 10, Table 2-1 “Configuration DIP Switch Settings” on page
8, and Table 2-3 “Jumper Settings” on page 8, for details.
When using the header strips to provide the bus interface observe the following:
• All I/O signals on the ISA bus card edge must be isolated from the ISA bus (do not plug the card
• For the ISA bus, a 22V10 PAL (U4, socketed) is currently used to provide the SED1355
1. This evaluation board supports a 16-bit ISA bus only.
2. The SED1355 is a memory-mapped device with 2M bytes of linear addressed display buffer
3. When using this board in a PC environment, system memory must be limited to 12M bytes, to
4. The hardware suspend enable/disable address is at location F00000h. A read to this location
Due to backwards compatibility with the SDU1355B0B Evaluation Board, which supports both
an 8 and a 16-bit CPU interface, third party software must perform a write at address F80000h in
order to enable a 16-bit ISA environment. This must be done prior to initializing the SED1355.
Failure to do so will result in the SED1355 being configured as a 16-bit device (default, power-
up), with the ISA Bus interface (supported through the PAL (U4)) configured for an 8-bit
interface.
The Epson supplied software performs this function automatically.
into a computer). Voltage lines are provided on the header strips.
CS# (pin 4), M/R# (pin 5) and other decode logic signals. This functionality must now be
provided externally. Remove the PAL from its socket to eliminate conflicts resulting from two
different outputs driving the same input. Refer to Table 2-2 “Host Bus Selection” on page 8 for
connection details.
and a separate 47 byte register space. On the SDU1355B0C, the SED1355 2M byte display
buffer has been mapped to a start address of C00000h and the registers have been mapped to a
start address of E00000h.
prevent the system addresses will conflict with the SED1355 display buffer/register
addresses.
will enable the hardware suspend, a write to the same location will disable it.
X23A-G-004-04
SED1355
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