sed1355 ETC-unknow, sed1355 Datasheet - Page 73

• Manufacturer Part Number: sed1355
• Description: Sed1355 Embedded Ramdac Lcd/crt Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
7.3.2 EDO-DRAM CAS Before RAS Refresh Timing
Hardware Functional Specification
Issue Date: 99/05/18
Symbol
t1
t2
t3
t4
t5
Internal memory clock period
RAS# precharge time (REG[22h] bits 3-2 = 00)
RAS# precharge time (REG[22h] bits 3-2 = 01)
RAS# precharge time (REG[22h] bits 3-2 = 10)
RAS# pulse width (REG[22h] bit 6-5 = 00 and bits 3-2
= 00)
RAS# pulse width (REG[22h] bit 6-5 = 00 and bits 3-2
= 01)
RAS# pulse width (REG[22h] bit 6-5 = 00 and bits 3-2
= 10)
RAS# pulse width (REG[22h] bit 6-5 = 01 and bits 3-2
= 00)
RAS# pulse width (REG[22h] bit 6-5 = 01 and bits 3-2
= 01)
RAS# pulse width (REG[22h] bit 6-5 = 01 and bits 3-2
= 10)
RAS# pulse width (REG[22h] bit 6-5 = 10 and bits 3-2
= 00)
RAS# pulse width (REG[22h] bit 6-5 = 10 and bits 3-2
= 01)
RAS# pulse width (REG[22h] bit 6-5 = 10 and bits 3-2
= 10)
CAS# pulse width
CAS# setup time (REG[22h] bits 3-2 = 00 or 10)
CAS# setup time (REG[22h] bits 3-2 = 01)
Parameter
Memory
Figure 7-16: EDO-DRAM CAS Before RAS Refresh Timing
Table 7-16: EDO-DRAM CAS Before RAS Refresh Timing
RAS#
CAS#
Clock
t4
t2
t1
t5
3.45 t1 - 3
2.45 t1 - 3
1.45 t1 - 3
0.45 t1 - 3
1.45t1 - 3
t6
3 t1 - 3
4 t1 - 3
2 t1 - 3
3 t1 - 3
1 t1 - 3
2 t1 - 3
1 t1 - 3
2t1 - 3
1t1 - 3
t3
Min
25
t2
Max
X23A-A-001-11
SED1355
Units
Page 67
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