sed1355 ETC-unknow, sed1355 Datasheet - Page 39
sed1355
Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet
1.SED1355.pdf
(509 pages)
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Epson Research and Development
Vancouver Design Center
5.3 Summary of Configuration Options
Hardware Functional Specification
Issue Date: 99/05/18
MD0
MD[3:1]
MD4
MD5
MD[7:6]
MD8
MD9
MD10
MD11
MD12
MD[15:13]
Pin Name
8-bit host bus interface
Select host bus interface:MD[11] = 0:
000 = SH-3/SH-4 bus interface
001 = MC68K Bus 1
010 = MC68K Bus 2
011 = Generic
100 = Reserved
101 = MIPS/ISA
110 = PowerPC
111 = PC Card (when MD11 = 1 Philips PR31500/PR31700 or Toshiba TX3912 Bus)
Little Endian
WAIT# is active high (1 = insert wait state)
Memory Address/GPIO configuration:
00 = symmetrical 256K 16 DRAM. MA[8:0] = DRAM address. MA[11:9] = GPIO2,1,3 pins.
01 = symmetrical 1M 16 DRAM. MA[9:0] = DRAM address. MA[10:11] = GPIO2,1 pins.
10 = asymmetrical 256K 16 DRAM. MA[9:0] = DRAM address. MA[10:11] = GPIO2,1 pins.
11 = asymmetrical 1M 16 DRAM. MA[11:0] = DRAM address.
Not used
SUSPEND# pin configured as GPO output
Active low LCDPWR polarity or
active high GPO polarity
Alternate Host Bus Interface Selected
BUSCLK input divided by 2
Not used
value on this pin at rising edge of RESET# is used to configure:
Table 5-5: Summary of Power On/Reset Options
1
16-bit host bus interface
Big Endian
WAIT# is active low (0 = insert wait state)
SUSPEND# pin configured as SUSPEND# input
Active high LCDPWR polarity or
active low GPO polarity
Primary Host Bus Interface Selected
BUSCLK input not divided
0
X23A-A-001-11
SED1355
(1/0)
Page 33
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