sed1355 ETC-unknow, sed1355 Datasheet - Page 83

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sed1355

Manufacturer Part Number
sed1355
Description
Sed1355 Embedded Ramdac Lcd/crt Controller
Manufacturer
ETC-unknow
Datasheet

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Epson Research and Development
Vancouver Design Center
7.5 Display Interface
7.5.1 4-Bit Single Monochrome Passive LCD Panel Timing
VDP =
VNDP =
HDP =
HNDP =
Hardware Functional Specification
Issue Date: 99/05/18
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 320x240 panel
Vertical Display Period
Vertical Non-Display Period
Horizontal Display Period
Horizontal Non-Display Period
FPFRAME
FPSHIFT
FPLINE
FPLINE
UD[3:0]
MOD
MOD
UD3
UD2
UD1
UD0
Figure 7-24: 4-Bit Single Monochrome Passive LCD Panel Timing
1-1
1-2
1-3
1-4
LINE1
1-6
1-7
1-8
1-5
LINE2
= ((REG[05h] bits [4:0]) + 1)*8Ts
= (REG[09h] bits [1:0], REG[08h] bits [7:0]) + 1
= (REG[0Ah] bits [5:0]) + 1
= ((REG[04h] bits [6:0]) + 1)*8Ts
LINE3
LINE4
VDP
HDP
LINE239 LINE240
VNDP
1-317
1-318
1-319
1-320
HNDP
LINE1
LINE2
X23A-A-001-11
SED1355
Page 77

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