mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 96
mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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2
wdebug.l
Execution Timings
2.7.5 Branch Instruction Execution Times
Table 2-17 shows general branch instruction timing.
1
2
3
4
Table 2-18 shows timing for Bcc instructions.
Opcode
wddata.
2-30
n is the number of registers moved by the MOVEM opcode
The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.
Opcode
{b,w,l}
unlk
Opcode
Assumes branch acceleration.
If predicted correctly by the hardware return stack.
If mispredicted by the hardware return stack.
If not predicted by the hardware return stack.
jmp
bra
bsr
rte
jsr
rts
bcc
Table 2-16. Miscellaneous Instruction Execution Times (Continued)
<ea>
<ea>
<ea>
Branch Cache Correctly
<ea>
<ea>
<ea>
Ax
Predicts Taken
Rn
0(0/0)
—
—
—
—
—
—
Table 2-17. Branch Instruction Execution Times
Table 2-18. Bcc Instruction Execution Times
1(1/0)
Rn
—
—
5(0/0)
5(0/1)
(An)
—
—
—
—
15(2/0)
1(1/0)
(An)
—
Prediction Table Correctly
15(2/0)
2(1/0)
9(1/0)
8(1/0)
(An)+
MCF5407 User’s Manual
—
—
—
—
Predicts Taken
2
3
4
(An)+
1(1/0)
—
—
1(0/0)
-(An)
—
—
—
—
—
—
Effective Address
1(1/0)
-(An)
—
—
Effective Address
(d16,An)
1(0/1)
1(0/1)
5(0/0)
5(0/1)
—
—
(d16,An)
15(2/0)
1(1/0)
1
1
—
Correctly as
Not Taken
Predicted
(d8,An,Xi*SF)
1(0/0)
(d8,An,Xi*SF) (xxx).wl
6(0/0)
6(0/1)
—
—
—
—
2(1/0)
—
—
Predicted Incorrectly
(xxx).wl
1(0/0)
1(0/1)
—
—
—
—
1(1/0)
—
—
8(0/0)
1
1
#<xxx>
#<xxx>
—
—
—
—
—
—
—
—
—
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