mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 198

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Background Debug Mode (BDM)
5.5.3.3.10 Read Control Register (
Read the selected control register and return the 32-bit result. Accesses to the
processor/memory control registers are always 32 bits wide, regardless of register width.
The second and third words of the command form a 32-bit address, which the debug
module uses to generate a special bus cycle to access the specified control register. The
12-bit Rc field is the same as that used by the MOVEC instruction.
Command/Result Formats:
Rc encoding:
Command Sequence:
Operand Data:
Result Data:
5-42
Command
Result
0x002
0x004
0x005
0x006
0x007
0x801
0x804
Rc
RCREG
???
Cache control register (CACR)
Access control register 0 (ACR0)
Access control register 1 (ACR1)
Access control register 2 (ACR2)
Access control register 2 (ACR3)
Vector base register (VBR)
MAC status register (MACSR)
15
Register Definition
0x2
0x0
0x0
"NOT READY"
Figure 5-38.
EXT WORD
MS ADDR
The only operand is the 32-bit Rc control register select field.
Control register contents are returned as a longword,
most-significant word first. The implemented portion of registers
smaller than 32 bits is guaranteed correct; other bits are undefined.
Figure 5-39.
12
Table 5-23. Control Register Map
11
"NOT READY"
RCREG
EXT WORD
MS ADDR
MCF5407 User’s Manual
RCREG
0x9
0x0
Command/Result Formats
RCREG
Command Sequence
D[31:16]
REGISTER
CONTROL
8
D[15:0]
LOCATION
MEMORY
0xC0F
0x80E
0xC04
0xC05
0x805
0x806
0x80F
READ
)
Rc
7
MAC mask register (MASK)
MAC accumulator (ACC)
Status register (SR)
Program register (PC)
RAM base address register (RAMBAR0)
RAM base address register (RAMBAR1)
Memory base address (MBAR)
0x8
0x0
Rc
Register Definition
"NOT READY"
MS RESULT
4
BERR
XXX
XXX
XXX
XXX
3
0x0
0x0
"NOT READY"
LS RESULT
NEXT CMD
NEXT CMD
0