mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 283

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

11.3.3.4 Extended Data Out (EDO) Operation
EDO is a variation of page mode that allows the DRAM to continue driving data out of the
device while CAS is precharging. To support EDO DRAMs, the DRAM controller delays
internal termination of the cycle by one clock so data can continue to be captured as CAS
is being precharged. For data to be driven by the DRAMs, RAS is held after CAS is
negated. EDO operation does not affect write operations. EDO DRAMs can be used in
continuous page or burst page modes. Single accesses not followed by a hit in the page look
like non-page-mode accesses.
Figure 11-11 shows four consecutive EDO accesses. Note that data is sampled after CAS
is negated and that on the last page access, CAS is held until after data is sampled to assure
that the data is driven. This allows RAS to be precharged before the end of the cycle.
RAS[1] or [0]
RAS[1] or [0]
CAS[3:0]
DRAMW
CAS[3:0]
D[31:0]
A[31:0]
DRAMW
CLKIN
D[31:0]
A[31:0]
CLKIN
Row
Figure 11-10. Write Hit in Continuous Page Mode
Chapter 11. Synchronous/Asynchronous DRAM Controller Module
RCD = 0
Figure 11-11. EDO Read Operation (3-2-2-2)
RCD = 0
CAS = 00
Bus Cycle 1
Column
CAS = 01
Page Hit
Page Miss
Bus Cycle 2
Asynchronous Operation
Column
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