mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 360

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Register Descriptions
Table 14-13 describes UACRn fields.
14.3.15 UART Interrupt Status/Mask Registers
The UART interrupt status registers (UISRn), Figure 14-18, provide status for all potential
interrupt sources. UISRn contents are masked by UIMRn. If corresponding UISRn and
UIMRn bits are set, the internal interrupt output is asserted. If a UIMRn bit is cleared, the
state of the corresponding UISRn bit has no effect on the output.
Table 14-14 describes UISRn and UIMRn fields.
14-18
7–1
0
Address
Address
Bits
Reset
Reset
Field
Field
R/W
R/W
Name
IEC
(UISRn/UIMRn)
—
Figure 14-18. UART Interrupt Status/Mask Registers (UISRn/UIMRn)
COS
7
7
Reserved, should be cleared.
Input enable control. This bit is not used in modem mode.
0 Setting the corresponding UIPCRn bit has no effect on UISRn[COS].
1 UISRn[COS] is set and an interrupt is generated when the UIPCRn[COS] is set by an external
True status is provided in the UISRn regardless of UIMRn
settings. UISRn is cleared when the UART module is reset.
transition on the CTS input (if UIMRn[COS] = 1).
Figure 14-17. UART Auxiliary Control Register (UACRn)
MBAR + 0x1D4 (UISR0), 0x214 (UISR1); MBAR + 0x1D4 (UIMR0), 0x214 (UIMR1)
6
Table 14-13. UACRn Field Descriptions
MBAR + 0x1D0 (UACR0), 0x210 (UACR1)
MCF5407 User’s Manual
—
NOTE:
—
0000_0000
0000_0000
Read only
Write only
Description
3
DB
2
FFULL/RxRDY
1
1
TxRDY
IEC
0
0