mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 85

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

ADD
ADDA
Instruction
Table 2-7 shows the syntax for the new and enhanced instructions, which are fully
described in Section 2.9, “ColdFire Instruction Set Architecture Enhancements.”
Some proposed opcodes were formerly present in the M68000 family, while other opcodes
are new functions.
2.6.2 Instruction Set Summary
Table 2-8 lists implemented user-level instructions by opcode.
• Enhancements to existing Revision_A instructions:
1
Branch Always
Branch Conditionally
Branch to Subroutine
Compare
Compare Address
Compare Immediate
Instruction Fetch Touch
Move 3-Bit Data Quick
Move Data Source to Destination
Move with Sign Extend
Move with Zero-Fill
Signed Saturate
Test and Set an Operand
— Longword support for branch instructions (Bcc, BRA, BSR)
— Byte and word support for compare instructions (CMP, CMPI)
— Word support for the compare address register instruction (CMPA)
— Byte and longword support for MOVE.x ,where the source is immediate data and
Operand sizes in this column reflect only newly supported operand sizes for existing instructions
(Bcc, BRA, BSR, CMP, CMPA, CMPI, and MOVE)
Dy,<ea>x
<ea>y,Dx
<ea>y,Ax
the destination is specified by d16(Ax); that is, MOVE.{B,W} #<data>, d16(Ax)
Operand Syntax
Instruction
Table 2-7. ColdFire ISA_B Extension Summary
Table 2-8. User-Level Instruction Set Summary
.L
.L
.L
Operand Size
Chapter 2. ColdFire Core
Mnemonic
move.{b,w}
cmp.{b,w,l}
cmpi.{b,w}
mvs.{b,w}
mvz.{b,w}
cmpa.
mov3q.l
intouch
sats.l
tas.b
bra.l
bcc.l
bsr.l
w
Source + destination → destination
Source + destination → destination
1
#<data>
#<data>
#<data>
Source
<ea>y
<ea>y
<ea>y
<ea>y
<Ay>
Destination
d16(Ax)
<label>
<label>
<label>
<ea>x
<ea>x
Dx
Dx
Dx
Dx
Dx
Ax
Operation
Instruction Set Summary
68K
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
2-19