mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 114

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

ColdFire Instruction Set Architecture Enhancements
MVS
Operation:
Assembler Syntax: MVS <ea>y,Dx
Attributes:
Description: Sign-extend the source operand and move to the destination register. For the
byte operation, bit 7 of the source is copied to bits 31–8 of the destination. For the word
operation, bit 15 of the source is copied to bits 31-16 of the destination.
Condition Codes:
Instruction Fields:
2-48
Instruction
Format:
—
X
• Size field—specifies the size of the operation
• Register field—specifies a data register as the destination.
• Effective address field—specifies the source operand; use only data addressing
Addressing Mode
0 byte operation
1 word operation
modes from the following table:
N
∗
(d
(Ay) +
– (Ay)
(Ay)
16
Dy
Ay
,Ay)
Z
∗
15
0
Operand sizes supported
14
1
V
0
Opcode present
(Source with sign extension) → Destination
Size = byte, word
Mode
000
001
010
011
100
101
13
1
MVS
C
0
12
1
reg. number:Dy
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
X Not affected
N Set if the result is negative; cleared otherwise
Z Set if the result is zero; cleared otherwise
V Always cleared
C Always cleared
Register
11
MCF5407 User’s Manual
Move with Sign Extend
REGISTER
10
9
V2, V3 Core
Addressing Mode
1
8
No
(d
—
(d
(d
#<data>
(xxx).W
(xxx).L
8
8
0
16
7
,PC,Xi)
,Ay,Xi)
,PC)
SIZ
E
6
5
Mode
MODE
110
111
111
111
111
111
EFFECTIVE ADDRESS
4
V4 Core
.b, .w
Yes
reg. number:Ay
3
Register
000
001
100
010
011
2
REGISTER
MVS
1
0