mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 105
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mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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BSR
Operation:
Assembler Syntax: BSR <label>
Attributes:
Description: Pushes the word address of the instruction immediately following the BSR
instruction onto the system stack. The PC contains the address of the instruction word, plus
two. Program execution then continues at location (PC) + displacement. The displacement
is a two’s complement integer that represents the relative distance in bytes from the current
PC to the destination PC. If the 8-bit displacement field in the instruction word is 0, a 16-bit
displacement (the word immediately following the instruction) is used. If the 8-bit
displacement field in the instruction word is all ones (0xFF), the 32-bit displacement
(longword immediately following the instruction) is used.
Condition Codes:
Instruction Fields:
Instruction
Format:
• 8-bit displacement field—Two’s complement integer specifying the number of bytes
• 16-bit displacement field—Used for displacement when the 8-bit displacement
• 32-bit displacement field—Used for displacement when the 8-bit displacement
between the branch instruction and the next instruction to be executed.
contains 0x00.
contains 0xFF.
15
A branch to the next immediate instruction automatically uses
the 16-bit displacement format because the 8-bit displacement
field contains 0x00 (zero offset).
0
Operand sizes supported
14
1
Opcode present
SP – 4 → SP; PC → (SP); PC + d
Size = byte, word, long
Not affected
13
1
BSR
12
0
32-bit displacement if 8-bit displacement = 0xFF
16-bit displacement if 8-bit displacement = 0x00
11
0
Chapter 2. ColdFire Core
Branch to Subroutine
10
0
NOTE:
ColdFire Instruction Set Architecture Enhancements
0
9
V2, V3 Core
1
8
.b, .w
Yes
7
n
6
→ PC
5
8-bit displacement
4
V4 Core
.b, .w, .l
Yes
3
2
BSR
1
0
2-39
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