mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 304
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mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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SDRAM Example
The DACRs should be programmed as shown in Figure 11-27.
This configuration results in a value of DACR0 = 0xFF88_0304, as described in
Table 11-35. DACR1 initialization is not needed because there is only one block.
Subsequently, DACR1[RE,IMRS,IP] should be cleared; everything else is a don’t care.
11-36
31–18
17–16
15
14
13–12
11
10–8
7
6
5–4
3
1 Mbyte
Setting
Setting
Bits
(hex)
(hex)
Field
Field RE
31
15
0
Name
CASL
IMRS
CBM
RE
BA
PS
—
—
—
—
IP
512 Kbyte
512 Kbyte
Bank 0
—
14
X
15
Setting
0
011
00
00
0
0
0
13
CASL
Figure 11-27. DACR Register Configuration
00
1 Mbyte
Table 11-35. DACR Initialization Values
Base address. So DACR0[31–16] = 0xFF88, which places the starting address of the
SDRAM accessible memory at 0xFF88_0000.
Reserved. Don’t care.
0, which keeps auto-refresh disabled because registers are being set up at this time.
Reserved. Don’t care.
Indicates a delay of data 1 cycle after CAS is asserted
Reserved. Don’t care.
Command bit is pin 20 and bank selects are 21 and up.
Reserved. Don’t care.
Indicates
32-bit port.
Indicates precharge has not been initiated.
12
Figure 11-26. SDRAM Configuration
—
11
X
MRS
MCF5407 User’s Manual
512 Kbyte
512 Kbyte
10
command has not been initiated.
1111_1111_1000_10
Bank 1
SDRAM Component
15
3
CBM
011
BA
1 Mbyte
8
—
X
7
Description
IMRS
0
6
512 Kbyte
512 Kbyte
Bank 2
8
0
5
PS
00
4
1 Mbyte
Accessible
Memory
IP
0
3
PM
18
2
1
512 Kbyte
512 Kbyte
8
4
Bank 3
17
1
—
xx
—
xx
16
0
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