mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 167

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Table 5-7 describes AATR and AATR1 fields
15
14–13 SZM
12–11 TTM
10–8
7
6–5
4–3
2–0
DRc[4–0]
Bits
Reset
Field RM
R/W AATR and AATR1 are accessible in supervisor mode as debug control register 0x06 and 0x16
RM
TMM
R
SZ
TT
TM
Name
respectively, and using the WDEBUG instruction and through the BDM port using the
Figure 5-6. Address Attribute Trigger Registers (AATR, AATR1)
15
Read/write mask. Setting RM masks R in address comparisons.
Size mask. Setting an SZM bit masks the corresponding SZ bit in address comparisons.
Transfer type mask. Setting a TTM bit masks the corresponding TT bit in address comparisons.
Transfer modifier mask. Setting a TMM bit masks the corresponding TM bit in address comparisons.
Read/write. R is compared with the R/W signal of the processor’s local bus.
Size. Compared to the processor’s local bus size signals.
00 Longword
01 Byte
10 Word
11 Reserved
Transfer type. Compared with the local bus transfer type signals.
00 Normal processor access
01 Reserved
10 Emulator mode access
11 Acknowledge/CPU space access
These bits also define the TT encoding for BDM memory commands. In this case, the 01 encoding
indicates an external or DMA access (for backward compatibility). These bits affect the TM bits.
Transfer modifier. Compared with the local bus transfer modifier signals, which give supplemental
information for each transfer type.
TT = 00 (normal mode):
000 Data and instruction cache line push
001 User data access
010 User code access
011 Instruction cache invalidate
100 Data cache push
101 Supervisor data access
110 Supervisor code access
111 INTOUCH instruction access
TT = 10 (emulator mode):
0xx–100 Reserved
101 Emulator mode data access
110 Emulator mode code access
111 Reserved
TT = 11 (acknowledge/CPU space transfers):
000 CPU space access
001–111 Interrupt acknowledge levels 1–7
These bits also define the TM encoding for BDM memory commands (for backward compatibility).
14
SZM
Table 5-7. AATR and AATR1 Field Descriptions
13
12
TTM
11
Chapter 5. Debug Support
10
0x06 (AATR); 0x16 (AATR1)
TMM
0000_0000_0000_0101
9
.
8
Description
R
7
6
SZ
5
4
TT
Programming Model
3
WDMREG
2
TM
command.
1
5-11
0