mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 42
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mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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Terminology and Notational Conventions
xlii
<ea>y,<ea>x
Instruction
PSTDDATA
# <vector>
MACSR
#<data>
<label>
<shift>
<size>
MASK
<xxx>
<list>
<ea>
CCR
ACC
PC
SR
SF
<>
dn
bc
dc
ic
+
–
x
MAC accumulator register
Condition code register (lower byte of SR)
MAC status register
MAC mask register
Program counter
Status register
Processor status/debug data port
Immediate data following the 16-bit operation word of the instruction
Effective address
Source and destination effective addresses, respectively
Assembly language program label
List of registers for MOVEM instruction (example: D3–D0)
Shift operation: shift left (<<), shift right (>>)
Operand data size: byte (B), word (W), longword (L)
Both instruction and data caches
Data cache
Instruction cache
Identifies the 4-bit vector number for trap instructions
identifies an indirect data address referencing memory
identifies an absolute address referencing memory
Signal displacement value, n bits wide (example: d16 is a 16-bit displacement)
Scale factor (x1, x2, x4 for indexed addressing mode, <<1n>> for MAC operations)
Arithmetic addition or postincrement indicator
Arithmetic subtraction or predecrement indicator
Arithmetic multiplication
Table ii Notational Conventions (Continued)
MCF5407 User’s Manual
Miscellaneous Operands
Register Names
Operations
Port Name
Operand Syntax
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