mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 92

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mcf5407

Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Execution Timings
Table 2-13 gives execution times for MOVE.L instructions accessing program-visible
registers of the MAC unit, along with other MOVE.L timings. Execution times for moving
contents of the ACC or MACSR into a destination location represent the best-case scenario
when the store instruction is executed and no load, MAC, or MSAC instructions are in the
MAC execution pipeline. In general, these store operations require only one cycle for
execution, but if they are preceded immediately by a load, MAC, or MSAC instruction, the
MAC pipeline depth is exposed and execution time is 3 cycles.
2.7.2 Execution Timings—One-Operand Instructions
Table 2-14 shows standard timings for single-operand instructions.
Opcode
(d8,PC,Xi*SF)
2-26
(d8,Ay,Xi*SF)
moveq
mov3q
move.l
move.l
move.l
move.l
move.l
move.l
move.l
mvs
mvz
(d16,PC)
(d16,Ay)
Source
#<xxx>
(xxx).w
(xxx).l
-(Ay)
<ea>,MACSR
MACSR,CCR
<ea>,MASK
MACSR,Rx
#imm,<ea>
<ea>,ACC
MASK,Rx
#imm,Dx
<ea>,Dx
<ea>,Dx
ACC,Rx
<ea>
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(0/0)
Table 2-12. Move Long Execution Times (Continued)
Rx
Table 2-13. Miscellaneous Move Execution Times
1(0/0)
6(0/0)
5(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
Rn
2(1/1)
2(1/1)
3(1/1)
2(1/1)
2(1/1)
2(1/1)
3(1/1)
1(0/1)
(Ax)
1(1/0)
1(1/0)
1(1/0)
(An)
MCF5407 User’s Manual
1(0/1)
(Ax)+
2(1/1)
2(1/1)
3(1/1)
2(1/1)
2(1/1)
2(1/1)
3(1/1)
1(1/0)
1(1/0)
1(1/0)
(An)+
1(1/0)
1(1/0)
1(1/0)
-(An)
Destination
2(1/1)
2(1/1)
3(1/1)
2(1/1)
2(1/1)
2(1/1)
3(1/1)
1(0/1)
-(Ax)
Effective Address
(d16,An)
1(1/0)
1(1/0)
1(1/0)
(d16,Ax)
2(1/1)
2(1/1)
2(1/1)
(d8,An,Xi*SF)
2(1/0)
2(1/0)
2(1/0)
(d8,Ax,Xi*SF)
3(1/1)
(xxx).wl
1(1/0)
1(1/0)
1(1/0)
(xxx).wl
2(1/1)
#<xxx>
1(0/0)
6(0/0)
5(0/0)
1(0/0)
1(0/0)
1(0/0)

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