mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 352

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Register Descriptions
14.3.5 Tx FIFO Threshold Register (TXLVL)
Tx FIFO threshold register (TXLVL) supports only UART1 in both UART and modem
modes. TXLVL holds the Tx FIFO threshold, the value at which the Tx FIFO is considered
to be empty for purposes of alerting the CPU that the Tx FIFO needs more data/samples.
Table 14-6 describes TXLVL fields.
14.3.6 UART Status Registers (USRn)
The USRn, Figure 14-7, shows status of the transmitter, the receiver, and the FIFO.
Table 14-7 describes USRn fields.
14-10
Bits
7–5
4–0
Address
Address
Reset
Reset
Field
Field
R/W
R/W
TXLVL
Name
—
RB
7
7
Reserved, should be cleared.
Tx FIFO empty threshold level. 0000–1111 selects values of 0–31 bytes, respectively. The Tx FIFO
is empty when the number of bytes in the FIFO is less than or equal to the Tx threshold value.
Although the FIFO thresholds are in numbers of bytes, data is written into and read out of the
FIFOs in numbers of samples, as follows:
For choosing threshold values, AC ‘97 samples should be thought of as 2-byte entities.
Choose the Tx threshold register value using the following formula:
For example, to indicate empty when three or fewer samples remain, calculate TXLVL as follows:
For 8-bit CODEC or UART mode, TXLVL = (3 samples) * (1 byte per sample) = 3 bytes
For 16-bit CODEC or AC ‘97 modes, TXLVL = (3 samples) * (2 bytes per sample) = 6 bytes
1 sample = 1 byte for 8-bit CODEC and UART modes
1 sample = 2 bytes for 16-bit CODEC and AC ‘97 modes
TXLVL = (# samples) * (# bytes per sample)
Figure 14-6. Tx FIFO Threshold Register (TXLVL)
Figure 14-7. UART Status Register (USRn)
FE
—
—
6
Table 14-6. TXLVL Field Descriptions
PE
5
5
MBAR + 0x1C4 (USR0), 0x204 (USR1)
MCF5407 User’s Manual
OE
MBAR + 0x203
4
4
0000_0000
Read only
Description
R/W
TxEMP
3
0_0000
TxRDY
TXLVL
2
FFULL
1
RxRDY
0
0