mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 428

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mcf5407

Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Debug Module/JTAG Signals
processor in debug mode. See Chapter 5, “Debug Support.”
17.14.3 Test Data Input/Development Serial Input (TDI/DSI)
If MTMOD0 is high, TDI is selected. TDI provides the serial data port for loading the
various JTAG boundary scan, bypass, and instruction registers. Shifting in data depends on
the state of the JTAG controller state machine and the instruction in the instruction register.
Shifts occur on the TCK rising edge. TDI has an internal pull-up resistor, so when not
driven low it defaults to high. But if TDI is not used, it should be tied to V
.
DD
If MTMOD0 is low, DSI is selected. DSI provides the single-bit communication for debug
module commands. See Chapter 5, “Debug Support.”
17.14.4 Test Data Output/Development Serial Output
(TDO/DSO)
If MTMOD0 is high, TDO is selected. The TDO output provides the serial data port for
outputting data from JTAG logic. Shifting out data depends on the JTAG controller state
machine and the instruction in the instruction register. Data shifting occurs on the falling
edge of TCK. When TDO is not outputting test data, it is three-stated. TDO can be
three-stated to allow bused or parallel connections to other devices having JTAG.
If MTMOD0 is low, DSO is selected. DSO provides single-bit communication for debug
module responses. See Chapter 5, “Debug Support.”
17.14.5 Test Clock (TCK)
TCK is the dedicated JTAG test logic clock independent of the MCF5407 processor clock.
Various JTAG operations occur on the rising or falling edge of TCK. Holding TCK high or
low for an indefinite period does not cause JTAG test logic to lose state information. If TCK
is not used, it must be tied to ground.
MCF5407 User’s Manual
17-22

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