mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 75
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mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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Programming Model
2.2.1.2 Address Registers (A0–A6)
The address registers (A0–A6) can be used as software stack pointers, index registers, or
base address registers and may be used for word and longword operations.
2.2.1.3 Stack Pointer (A7, SP)
The processor core supports a single hardware stack pointer (A7) used during stacking for
subroutine calls, returns, and exception handling. The stack pointer is implicitly referenced
by certain operations and can be explicitly referenced by any instruction specifying an
address register. The initial value of A7 is loaded from the reset exception vector, address
0x0000. The same register is used for user and supervisor modes, and may be used for word
and longword operations.
A subroutine call saves the program counter (PC) on the stack and the return restores the
PC from the stack. The PC and the status register (SR) are saved on the stack during
exception and interrupt processing. The return from exception instruction restores SR and
PC values from the stack.
2.2.1.4 Program Counter (PC)
The PC holds the address of the executing instruction. For sequential instructions, the
processor automatically increments PC. When program flow changes, the PC is updated
with the target instruction. For some instructions, the PC specifies the base address for
PC-relative operand addressing modes.
2.2.1.5 Condition Code Register (CCR)
The CCR, Figure 2-4, occupies SR[7–0], as shown in Figure 2-3. CCR[4–0] are indicator
flags based on results generated by arithmetic operations.
7
6
5
4
3
2
1
0
Field
—
X
N
Z
V
C
Reset
Undefined
R/W
R
R/W
R/W
R/W
R/W
R/W
Figure 2-4. Condition Code Register (CCR)
Table 2-1 describes the CCR fields.
Chapter 2. ColdFire Core
2-9
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