mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 389

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Table 15-3 shows relationships between PADAT bits and parallel port pins when PADAT is
accessed. The effect differs when the parallel port pin is an input or output.
The following results occur when a parallel port pin is configured as an input:
The following results occur when a parallel port pin is configured as an output:
These relationships are also described in Table 15-3.
PP Status PADAT R/W
Output
Input
• PADAT settings do not affect inputs. PADAT bit values determine the corresponding
• PADAT can be written to anytime. A read from PADAT returns values of
• When the PADAT is read, the value returned is the logic value on the pin.
• When the PADAT is written, the register contents are updated without affecting the
• When the PADAT is read, the register contents are returned and the pin is the logic
• When the PADAT is written, the register contents are updated and the pin is the logic
Table 15-3. Relationship between PADAT Register and Parallel Port Pin (PP)
Address
logic levels of pins configured as outputs.
corresponding pins configured as general-purpose I/O in the PAR and designated as
inputs by the PADDR.
logic value on the pin.
value of the register.
value of the register.
Reset
Field
R/W
Read
Write
Read
Write
Although external devices cannot access the MCF5407’s
on-chip memories or MBAR, they can access any parallel port
module registers in the SIM.
15
Register bit value is the pin’s logic value
Register contents updated
Register contents are returned
Register contents updated
Figure 15-3. Port A Data Register (PADAT)
Chapter 15. Parallel Port (General-Purpose I/O)
Effect on PADAT
0000_0000_0000_0000
Address MBAR+0x248
NOTE:
PADAT
R/W
No effect. Source of logic value
No effect on the logic value at the pin
Pin is the logic value of the register bit
Pin is the logic value of the register bit
Effect on PP
Parallel Port Operation
0
15-3