mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 29

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

9/1/00
Table
Number
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
2-22
3-1
3-2
3-3
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
User-Level Registers................................................................................................... 1-15
Supervisor-Level Registers......................................................................................... 1-16
CCR Field Descriptions ............................................................................................. 2-10
MOVEC Register Map ............................................................................................... 2-11
Status Field Descriptions ............................................................................................ 2-11
Integer Data Formats................................................................................................... 2-13
ColdFire Effective Addressing Modes........................................................................ 2-15
Notational Conventions .............................................................................................. 2-16
ColdFire ISA_B Extension Summary......................................................................... 2-19
User-Level Instruction Set Summary.......................................................................... 2-19
Supervisor-Level Instruction Set Summary................................................................ 2-23
Misaligned Operand References ................................................................................. 2-24
Move Byte and Word Execution Times...................................................................... 2-25
Move Long Execution Times...................................................................................... 2-25
Miscellaneous Move Execution Times....................................................................... 2-26
One-Operand Instruction Execution Times ................................................................ 2-27
Two-Operand Instruction Execution Times................................................................ 2-27
Miscellaneous Instruction Execution Times............................................................... 2-29
Branch Instruction Execution Times .......................................................................... 2-30
Bcc Instruction Execution Times................................................................................ 2-30
Exception Vector Assignments................................................................................... 2-32
Format Field Encoding ............................................................................................... 2-33
Fault Status Encodings................................................................................................ 2-33
MCF5407 Exceptions ................................................................................................. 2-34
MAC Instruction Summary........................................................................................... 3-4
Two-Operand MAC Instruction Execution Times ....................................................... 3-5
MAC Move Instruction Execution Times..................................................................... 3-6
RAMBARn Field Description ...................................................................................... 4-3
Examples of Typical RAMBAR Settings ..................................................................... 4-6
Valid and Modified Bit Settings ................................................................................... 4-8
CACR Field Descriptions ........................................................................................... 4-21
ACRn Field Descriptions............................................................................................ 4-24
Instruction Cache Line State Transitions.................................................................... 4-27
Data Cache Line State Transitions.............................................................................. 4-29
Data Cache Line State Transitions (Current State Invalid) ........................................ 4-30
Data Cache Line State Transitions (Current State Valid)........................................... 4-31
TABLES
Tables
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Number
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