mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 220

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mcf5407

Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Programming Model
Table 6-3 describes RSR fields.
6.2.4 Software Watchdog Timer
The software watchdog timer prevents system lockup should the software become trapped
in loops with no controlled exit. The software watchdog timer can be enabled or disabled
through SYPCR[SWE]. If enabled, the watchdog timer requires the periodic execution of
a software watchdog servicing sequence. If this periodic servicing action does not occur,
the timer times out, resulting in a watchdog timer IRQ or hardware reset with RSTO driven
low, as programmed by SYPCR[SWRI].
If the timer times out and the software watchdog transfer acknowledge enable bit
(SYPCR[SWTA]) is set, a watchdog timer IRQ is asserted. Note that the software watchdog
timer IACK cycle cannot be autovectored.
If a software watchdog timer IACK cycle has not occurred after another timeout, SWT TA
is asserted in an attempt to terminate the bus cycle and allow the IACK cycle to proceed.
The setting of SYPCR[SWTAVAL] indicates that the watchdog timer TA was asserted.
Figure 6-4 shows termination of a locked bus.
6-6
Bits
4–0
7
6
5
SWTR
Name
HRST
Hardware or system reset
1 An external device driving RSTI caused the last reset. Assertion of reset by an external
Reserved, should be cleared.
Software watchdog timer reset
1 The last reset was caused by the software watchdog timer. If SYPCR[SWRI] = 1 and the
Reserved, should be cleared.
device causes the core processor to take a reset exception. All registers in internal
peripherals and the SIM are reset.
software watchdog timer times out, a hardware reset occurs.
Table 6-3. RSR Field Descriptions
MCF5407 User’s Manual
Description

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