mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 527

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

1
2
3
4
MBAR
Offset
0x23C
UMR1n, UMR2n, UCSRn, and UACRn[BRG] should be changed only after the receiver/transmitter is issued a
software reset command. That is, if channel operation is not disabled, undesirable results may occur.
This address is for factory testing. Reading this location results in undesired effects and possible incorrect
transmission or reception of characters. Register contents may also be changed.
Address-triggered commands
UMR1n, UMR2n, UCSRn, and UACRn[BRG] should be changed only after the receiver/transmitter is issued a
software reset command. That is, if channel operation is not disabled, undesirable results may occur.
Offset
MBAR
0x230
0x234
0x238
0x200
0x204
0x244
0x248
Parallel port data direction register (PADDR)
[p. 15-2]
Parallel port data register (PADAT) [p. 15-2]
UART interrupt vector
register—(UIVRn)
[p. 14-20]
(Read) UART input port
registers—(UIPn)
[p. 14-20]
(Write) Do not access
(Read) Do not access
(Write) UART output
port bit set command
registers—(UOP1n
[p. 14-21]
(Read) Do not access
(Write) UART output
port bit reset command
registers—(UOP0n
[p. 14-21]
UART mode
registers
[p. 14-5], (UMR2n)
[p. 14-7]
(Read) UART status
registers—(USRn)
[p. 14-10]
(Write) UART
clock-select
register
[p. 14-12]
1
[31:24]
—(UCSRn)
[31:24]
4
—(UMR1n)
Table B-7. UART1 Control Registers (Continued)
3
3
Table B-8. Parallel Port Memory Map
)
)
2
2
2
Appendix B. List of Memory Maps
—
—
—
—
—
—
—
Rx FIFO threshold
register—(RXLVL)
[p. 14-10] (UART1 only)
—
[23:16]
[23:16]
Modem control
register—(MODCTL)
[p. 14-9] (UART1 only)
(Read) Rx samples
available
register—(RSMP)
[p. 14-12] (UART1 only)
[15:8]
[15:8]
Reserved
Reserved
Tx FIFO threshold
register—(TXLVL)
[p. 14-10] (UART1 only)
(Read) Tx space
available
register—(TSPC)
[p. 14-13] (UART1 only)
[7:0]
[7:0]
B-7