mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 7

• Manufacturer Part Number: mcf5407
• Description: Mcf5407 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

2.6.2
2.7
2.7.1
2.7.2
2.7.3
2.7.4
2.7.5
2.8
2.8.1
2.8.2
2.9
3.1
3.1.0.1
3.1.0.2
3.1.0.3
3.1.0.4
3.2
4.1
4.2
4.3
4.4
4.4.1
4.5
4.5.1
4.6
4.7
4.8
4.8.1
4.8.2
4.9
4.9.1
4.9.1.1
4.9.1.2
4.9.1.3
Paragraph
Number
Execution Timings ............................................................................................ 2-23
Exception Processing Overview ....................................................................... 2-31
ColdFire Instruction Set Architecture Enhancements....................................... 2-36
Overview............................................................................................................. 3-1
MAC Instruction Execution Timings.................................................................. 3-5
Interactions between Local Memory Modules ................................................... 4-1
SRAM Overview ................................................................................................ 4-1
SRAM Operation ................................................................................................ 4-2
SRAM Programming Model............................................................................... 4-3
SRAM Initialization............................................................................................ 4-4
Power Management ............................................................................................ 4-6
Cache Overview.................................................................................................. 4-6
Cache Organization............................................................................................. 4-8
Cache Operation................................................................................................ 4-11
Instruction Set Summary .............................................................................. 2-19
MOVE Instruction Execution Timing .......................................................... 2-25
Execution Timings—One-Operand Instructions .......................................... 2-26
Execution Timings—Two-Operand Instructions.......................................... 2-27
Miscellaneous Instruction Execution Times................................................. 2-29
Branch Instruction Execution Times ............................................................ 2-30
Exception Stack Frame Definition................................................................ 2-32
Processor Exceptions .................................................................................... 2-34
SRAM Base Address Registers (RAMBAR0/RAMBAR1)........................... 4-3
SRAM Initialization Code .............................................................................. 4-5
Cache Line States: Invalid, Valid-Unmodified, and Valid-Modified............. 4-8
The Cache at Start-Up..................................................................................... 4-9
Caching Modes ............................................................................................. 4-13
MAC Programming Model......................................................................... 3-2
General Operation....................................................................................... 3-3
MAC Instruction Set Summary .................................................................. 3-4
Data Representation.................................................................................... 3-4
Cacheable Accesses .................................................................................. 4-14
Write-Through Mode (Data Cache Only)................................................. 4-14
Copyback Mode (Data Cache Only)......................................................... 4-14
Hardware Multiply/Accumulate (MAC) Unit
CONTENTS
Local Memory
Chapter 3
Chapter 4
Contents
Title
Number
Page
vii