mcf5407 Freescale Semiconductor, Inc, mcf5407 Datasheet - Page 83
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mcf5407
Manufacturer Part Number
mcf5407
Description
Mcf5407 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5407.pdf
(546 pages)
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If <condition>
<operations>
<operations>
Instruction
Address
<xxx>
MSW
LSW
MSB
←→
then
LSB
msb
else
SF
lsb
dn
<<
>>
Bit
→
d
+
~
&
{}
()
–
x
^
/
|
n
identifies an absolute address referencing memory
Signal displacement value, n bits wide (example: d16 is a 16-bit displacement)
Scale factor (x1, x2, x4 for indexed addressing mode, <<1n>> for MAC operations)
Arithmetic addition or postincrement indicator
Arithmetic subtraction or predecrement indicator
Arithmetic multiplication
Arithmetic division
Invert; operand is logically complemented
Logical AND
Logical OR
Logical exclusive OR
Shift left (example: D0 << 3 is shift D0 left 3 bits)
Shift right (example: D0 >> 3 is shift D0 right 3 bits)
Source operand is moved to destination operand
Two operands are exchanged
All bits of the upper portion are made equal to the high-order bit of the lower portion
Test the condition. If the condition is true, the operations in the then clause are performed. If the
condition is false and the optional else clause is present, the operations in the else clause are
performed. If the condition is false and the else clause is omitted, the instruction performs no
operation. Refer to the Bcc instruction description as an example.
Optional operation
Identifies an indirect address
Displacement value, n-bits wide (example: d
Calculated effective address (pointer)
Bit selection (example: Bit 3 of D0)
Least significant bit (example: lsb of D0)
Least significant byte
Least significant word
Most significant bit
Most significant byte
Most significant word
Table 2-6. Notational Conventions (Continued)
Chapter 2. ColdFire Core
Subfields and Qualifiers
Operations
Operand Syntax
16
is a 16-bit displacement)
Instruction Set Summary
2-17
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