upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 86

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

3.4.7 Cautions
(1)
Be sure to set the following registers first when using the V850E/RS1.
After setting the VSWC, OCDM, and WDTM2 registers, set the other registers as necessary.
When using the external bus, set each pin to the alternate-function bus control pin mode by using the
port-related registers after setting the above registers.
(2)
Caution:
86
Symbol
VSWC
R/W
Registers to be set first
• System wait control register (VSWC)
• On-chip Debug Mode control register (OCDM)
• Watchdog timer mode register 2 (WDTM2)
Area access time (VSWC) and On chip debug mode control register (OCDM)
(a) System wait control register (VSWC)
The system wait control register (VSWC) controls wait of bus access to the internal peripheral I/O
registers.
Three clocks are required to access an internal peripheral I/O register (without a wait cycle). The
V850E/RS1 requires wait cycles according to the operating frequency. Set the following value to
the VSWC register in accordance with the frequency used.
The VSWC register can be read or written in 8-bit units.
R
Only select a value that corresponds to a supported operating frequency.
7
0
SUWL2 SUWL1 SUWL0
R/W
Figure 3-25: System Wait Control Register (VSWC) Format
Operation Frequency (f
6
25 MHz ≤ φ ≤ 33 MHz
33 MHz ≤ φ ≤ 40 MHz
4 MHz ≤ φ ≤ 25 MHz
R/W
5
User’s Manual U16702EE3V2UD00
R/W
Chapter 3 CPU Function
4
XX
)
R
3
0
VSWL2 VSWL1 VSWL0
R/W
2
VSWC setting
R/W
11H
12H
14H
1
R/W
0
FFFFF06EH
Address
After reset
77H