upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 342

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
8.5.7 Free-running mode (TQnMD2 to TQnMD0 = 101)
In the free-running mode, both the interval function and the compare function can be realized by
operating the 16-bit counter as a free-running counter and selecting capture/compare operation with
the TQnCCS3 to TQnCCS0 bits of the TQnOPT0 register.
The settings of the TQnCCS3 to TQnCCS0 bits of the TQnOPT0 register are valid only in the
free-running mode.
When the value of the 16-bit counter matches the value of the CCRm buffer register in the free-running
mode, an interrupt is generated (interval function).
Rewriting the value of the compare register is enabled during timer operation, and a value can be
written to the register at any time (when the value to be compared is written to the register, it is
synchronized with the internal clock and compared with the value of the 16-bit counter).
If timer output (TOQnm) is enabled, TOQnm produces a toggle output when the value of the 16-bit
counter matches the value of the CCRm buffer register.
The value of the 16-bit counter is saved to the TQnCCRm register upon TIQnm pin edge detection.
Remark:
342
• When TQnCCRm register is used as compare register
• When TQnCCRm register is used as capture register
n = 0 to 1
m = 0 to 3
TQnCCSm
0
1
Chapter 8 16-Bit Timer/Event Counter Q
User’s Manual U16702EE3V2UD00
Use TQnCCRm register as compare register
Use TQnCCRm register as capture register
Operation

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