upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 242

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

(8)
Caution:
242
Symbol
OCKS2
R/W
OCKSEN2
OCKSTH2
Clock selection register 2 (OCKS2)
This is an 8-bit register that controls the operation enable and clock selection for CSIBn
(n = 0, 1).
OCKS21
0
1
0
1
0
0
1
1
R
7
0
When PLL mode operation is enabled, OCKS2 register value must not be changed.
Operation Disable
Operation Enable
Output clock is divided clock by setting OCKS21 and OCKS20
Output clock is through (Extended clock = f
OCKS20
R
6
0
Figure 6-9: Clock Selection Register 2 (OCKS2) Format
0
1
0
1
R
5
0
OCKSEN2 OCKSTH2
R/W
User’s Manual U16702EE3V2UD00
Chapter 6 Clock Generator
4
Specified for output clock through or divide
Specified for execution enable
R/W
3
Extended clock = f
Extended clock = f
Extended clock = f
Extended clock = f
Specified for divider factor
PLL_PCKSEL
R
2
0
OCKS21 OCKS20 FFFFF868H
R/W
1
)
PLL_PCKSEL
PLL_PCKSEL
PLL_PCKSEL
PLL_PCKSEL
R/W
0
/ 2
/ 3
/ 4
/ 5
Address
After reset
00H