upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 316

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

TQ0IOC2
TQ1IOC2
(5)
Cautions: 1. Rewrite bits TQnEES1, TQnEES0, TQnEST1, and TQnEST0 when TQnCE = 0. (The
Remark:
316
Symbol
Symbol
TQnEES1
Timer Q dedicated I/O control register 2 (TQnIOC2)
The TQnIOC2 register is an 8-bit register that controls the valid edge of the external event count
input signal (TIQn0) and external trigger input signal (TIQn0).
This register can be read or written in 8-bit or 1-bit units.
RESET input clears this register to 00H.
TQnETS1
0
0
1
1
0
0
1
1
7
0
7
0
2. The TQnEES1 and TQnEES0 bits are valid when TQnEEE = 1 or when the external
n = 0, 1
Figure 8-11: Timer Q Dedicated I/O Control Register 2 (TQnIOC2) Format
same value can be written when TQnCE = 1.) If rewriting was mistakenly
performed, set TQnCE = 0 and then set the bits again.
event count mode is set (TQnMD2 to TQnMD0 of TIQnCTL1 register = 001).
TQnEES0
TQnETS0
6
0
6
0
0
1
0
1
0
1
0
1
5
0
5
0
Chapter 8 16-Bit Timer/Event Counter Q
Detect no edge (external event count is invalid).
Detection of rising edge
Detection of falling edge
Detection of both edges
Detect no edge (external trigger is invalid).
Detection of rising edge
Detection of falling edge
Detection of both edges
User’s Manual U16702EE3V2UD00
4
0
4
0
Setting of valid edge of external event count input (TIQn0)
Setting of valid edge of external trigger input (TIQn0)
TQ0EES1 TQ0EES0 TQ0ETS1 TQ0ETS0 FFFFF544H R/W 00H
TQ1EES1 TQ1EES0 TQ1ETS1 TQ1ETS0 FFFFF614H R/W 00H
3
3
2
2
1
1
0
0
Address
Address
R/W
R/W
reset
reset
After
After