upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 360

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
10.2 Configuration
Watchdog Timer 2 consists of the following hardware.
10.3 Control Registers
(1)
Notes: 1. The oscillation stabilization time and setup time are required when the software stop mode
360
Symbol
OSTS
R/W
Oscillation stabilization time select register (OSTS)
The OSTS register selects the oscillation stabilization time following reset or release of the stop
mode.
This register is set by an 8-bit manipulation instruction.
RESET input sets this register to 03H.
OSTS2
2. f
0
0
0
0
1
1
1
1
R/W
Figure 10-2: Oscillation Stabilization Time Select Register (OSTS) Format
and idle mode are released, respectively.
7
0
X
: Main clock oscillator frequency
OSTS1
Control registers
0
0
1
1
0
0
1
1
R/W
6
0
Item
OSTS0
Table 10-1: Configuration of Watchdog Timer 2
Chapter 10 Functions of Watchdog Timer 2
R/W
0
1
0
1
0
1
0
1
5
0
Setting prohibited
Oscillation stabilization time select register (OSTS)
Watchdog timer mode register 2 (WDTM2)
Watchdog timer enable register (WDTE)
Selected clock
User’s Manual U16702EE3V2UD00
R/W
4
0
2
2
2
2
2
2
2
10
11
12
13
14
15
16
Selection of oscillation stabilization time/setup time
/f
/f
/f
/f
/f
/f
/f
X
X
X
X
X
X
X
R/W
3
0
OSTS2 OSTS1 OSTS0
R/W
Configuration
2
R/W
1
0.128 ms
0.256 ms
0.512 ms
1.024 ms
2.048 ms
4.096 ms
8.192 ms
f
8 MHz
X
R/W
Note 2
0
FFFFF6C0H
Address
Note 1
After reset
03H

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