upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 69

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

(6)
(7)
DBPSW
CTBP
Figure 3-8: Exception/Debug Trap Status Saving Registers (DBPC and DBPSW) Format
DBPC
Exception/debug trap status saving registers (DBPC and DBPSW)
DBPC and DBPSW are exception/debug trap status registers.
If an exception trap or debug trap occurs, the contents of the program counter (PC) are saved to
DBPC, and those of the program status word (PSW) are saved to DBPSW.
The contents to be saved to DBPC are the address of the instruction next to the one that is being
executed when an exception trap or debug trap occurs.
The current contents of the PSW are saved to DBPSW.
Bits 31 to 26 of DBPC and bits 31 to 8 of DBPSW are reserved (fixed to 0) for future function
expansion.
The values of DBPC and DBPSW are restored to PC and PSW during execution of the DBRET
instruction.
CALLT base pointer (CTBP)
The CALLT base pointer (CTBP) is used to specify a table address or generate a target address
(bit 0 is fixed to 0).
Bits 31 to 26 of this register are reserved (fixed to 0) for future function expansion.
31
0
31
31
0
0
0
0
0
0 0 0 0
0 0 0 0
0 0 0 0
26 25
26 25
Figure 3-9: CALLT Base Pointer (CTBP) Format
0
0
User’s Manual U16702EE3V2UD00
0 0 0 0
Chapter 3 CPU Function
0
0
0 0 0 0
(Base address)
(PC contents)
0
0
0 0 0 0
8
(PSW contents)
0
0
0
0
(x: Undefined)
(x: Undefined)
(x: Undefined)
0xxxxxxxH
After reset
000000xxH
0xxxxxxxH
After reset
After reset
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