upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 361

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
(2)
WDTM2
Cautions: 1. For details of bits WDCS20 to WDCS24, refer to Table 10-2, “Watchdog Timer 2
Symbol
R/W
Watchdog timer mode register 2 (WDTM2)
The WDTM2 register sets the overflow time and operation clock of Watchdog timer 2.
This register can be read or written in 8-bit or 1-bit units. This register can be read any number of
times, but it can be written only once following reset release. Writing to this register will
automatically clear the Watchdog timer counter to 0000H.
RESET input sets this register to 67H.
R/W
2. Although Watchdog timer 2 can be stopped just by stopping the operation of
3. If the WDTM2 register is rewritten twice after reset, an overflow signal is forcibly
4. To stop the operation of Watchdog timer 2, set the RSTP bit of the RCM register
7
0
WDM21
Clock Selection,” on page 362.
Ring-OSC, set the WDTM2 register to 1FH to securely stop the timer (to avoid
selection of the main clock due to an erroneous write operation).
generated. But, the overflow signal does not occur, even if the WDTM2 register is
written twice after the watch dog timer is suspended.
to 1 (to stop Ring-OSC) and the WDTM2 register to 1FH.
Figure 10-3: Watchdog Timer Mode Register 2 (WDTM2) Format
0
0
1
WDM21 WDM20 WDCS24 WDCS23 WDCS22 WDCS21 WDCS20 FFFFF6D0H
R/W
6
WDM20
0
1
-
Chapter 10 Functions of Watchdog Timer 2
R/W
5
User’s Manual U16702EE3V2UD00
Stops operation
Non-maskable interrupt request mode (generation of
INTWDT2)
Reset mode (generation of WDTRES2)
R/W
4
Selection of operation mode of Watchdog Timer 2
R/W
3
R/W
2
R/W
1
R/W
0
Address
After reset
67H
361

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