upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 588

no-image

upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
16.6 Control Registers
(1)
(a) Read
Cautions: 1. While the MBON bit is cleared (to 0), software access to the message buffers
Remark:
588
CnGMCTRL MBON
CnGMCTRL
MBON
CAN global control register (CnGMCTRL)
The CnGMCTRL register is used to control the operation of the CAN module.
(a) Read
(b) Write
0
1
2. This bit is read-only. Even if 1 is written to MBON while it is 0, the value of MBON
When the CAN sleep mode/CAN stop mode is entered, or when the GOM bit is cleared to 0,
the MBON bit is cleared to 0.
When the CAN sleep mode/CAN stop mode is released, or when the GOM bit is set to 1,
the MBON bit is set to 1.
Write access and read access to the message buffer register and the transmit/receive history list
registers is disabled.
Write access and read access to the message buffer register and the transmit/receive history list
registers is enabled.
Figure 16-23: CAN Global Control Register (CnGMCTRL) Format (1/2)
15
15
(CnMDATA0m,
CnMDATA23m,
CnMDATA7m, CnMDATA67m, CnMDLCm, CnMCONFm, CnMIDLm, CnMIDHm, and
CnMCTRLm), or registers related to transmit history or receive history (CnLOPT,
CnTGPT, CnLIPT, and CnRGPT) is disabled.
does not change, and access to the message buffer registers, or registers related
to transmit history or receive history remains disabled.
7
0
0
7
0
Bit enabling access to message buffer register, transmit/receive history registers
14
14
0
6
0
0
6
0
13
13
0
5
0
0
5
0
CnMDATA1m,
CnMDATA4m,
Chapter 16 FCAN Controller
User’s Manual U16702EE3V2UD00
12
12
0
4
0
0
4
0
11
11
0
3
0
0
3
0
CnMDATA01m,
CnMDATA5m,
10
10
0
2
0
0
2
0
EFSD
EFSD
Set
9
0
1
9
1
0
CnMDATA45m,
CnMDATA2m,
GOM
GOM
Clear
GOM
Set
8
0
0
8
0
see Table
Address R/W After reset
Address R/W After reset
16-4
CnMDATA3m,
CnMDATA6m,
R/W
0000H

Related parts for upd70f3402