upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 318

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
QnmNFC
(7)
Cautions: 1. Be sure to clear bits 3 to 5 and 7 to 0.
Remarks: 1. The width of the noise that can be accurately eliminated is (Sampling clock) × (Number
318
Symbol
Other than above
TIQnm pin noise elimination control register n (QnmNFC)
The QnmNFC register is an 8-bit register that sets the digital noise filter of the timer Q input pin.
This register can be read or written in 8-bit or 1-bit units.
RESET input clears this register to 00H.
NFSTS
NFC2
Figure 8-13: TIQnm Pin Noise Elimination Control Register n (QnmNFC) Format
Address: Q00NFC: FFFFFB50H (TIQ00 pin)
0
1
0
0
0
0
1
1
2. A signal input to the timer input pin (TIQnm) before the QnmNFC register is set is
2. n: Number of timer channels (0, 1)
7
0
output with digital noise eliminated. Therefore, set the sampling clock (NFC2 to
NFC0) and the number of times of sampling (NFSTS) by using the QnmNFC
register, wait for initialization time = (Sampling clock) × (Number of times of
sampling), and enable the timer operation.
of times of sampling – 1). Even noise with a width narrower than this may cause a
miscount if it is synchronized with the sampling clock.
m: Number of input pins (0 to 3)
3 times
2 times
Q01NFC: FFFFFB54H (TIQ01 pin)
Q02NFC: FFFFFB58H (TIQ02 pin)
Q03NFC: FFFFFB5CH (TIQ03 pin)
Q10NFC: FFFFFB60H (TIQ10 pin)
Q11NFC: FFFFFB64H (TIQ11 pin)
Q12NFC: FFFFFB68H (TIQ12 pin)
Q13NFC: FFFFFB6CH (TIQ13 pin)
NFSTS
NFC1
6
0
0
1
1
0
0
Chapter 8 16-Bit Timer/Event Counter Q
5
0
Selection of sampling times number for digital noise filtering
NFC0
0
1
0
1
0
1
User’s Manual U16702EE3V2UD00
4
0
Setting prohibited
3
0
NFC2
2
Sampling clock selection
NFC1
1
fxx/16
fxx/32
fxx/64
fxx/2
fxx/4
fxx
NFC0
<0>
FFFFFB6CH
FFFFFB50H
Address
to
R/W
R/W 00H
reset
After

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