upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 296

no-image

upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
(4)
Remarks: 1. D00, D01, D02, D03: Values captured to TPnCCR0 register (0000H to FFFFH)
(5)
296
match interrupt
match interrupt
Figure 7-31: Basic Operation Timing in Free-Running Mode (TPnCCS1 = 0, TPnCCS0 = 1)
INTTPnCC0
INTTPnCC1
CCR1 buffer
When TPnCCS1 = 0 and TPnCS0 = 1
When TPnCE is set to 1, the 16-bit counter counts from 0000H to FFFFH and free-running
count-up operation continues until TPnCE = 0 is set. The TPnCCR1 register is used as a compare
register. An interrupt signal is output upon a match between the value of the 16-bit counter and the
setting value of the TPnCCR1 register as an interval function. When TPnOE1 = 1 is set, TOPn1
performs toggle output upon mach between the value of the 16-bit counter and the setting value of
the TPnCCR1 register.
Even if TPnOE0 = 1 to realize the output function, TPnCCR0 register cannot control TOPn0
because it is used as capture register.
Overflow flag
When the counter overflows from FFFFH to 0000H in the free-running mode, the overflow flag
(TPnOVF) is set to 1 and an overflow interrupt (INTTPnOV) is output.
The overflow flag is cleared by the CPU when writing 0 to it.
INTTPnOV
TPnCCR0
TPnCCR1
counter
TOPn0
TOPn1
register
FFFFH
TIPn0
16-bit
2. TIPn0: Set to falling edge detection (TPnIS1, TPnIS0 = 10)
3. n = 0 to 3
D10, D11, D12: Setting compare value of TPnCCR1 register (0000H to FFFFH)
0000H
TPnCE = 1
L
(TPnOE0 = 1, TPnOE1 = 1, TPnOL0 = 0, TPnOL1 = 0)
D
10
Chapter 7 16-Bit Timer/Event Counter P
0000H
D
10
D
10
User’s Manual U16702EE3V2UD00
D
00
D
D
11
00
D
01
D
D
11
11
D
01
D
02
D
11
D
D
12
02
D
03
D
D
12
12
D
03

Related parts for upd70f3402