upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 789

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

25.1 Functions of Clock Monitor
The clock monitor samples the main clock (X1 input clock) by using the on-chip Ring-OSC, and
generates a reset request signal when oscillation of the main clock is stopped.
Once the operation of the clock monitor has been enabled by an operation enable flag, it cannot be
cleared to 0 by any means other than reset.
The clock monitor automatically stops under the following conditions.
25.2 Configuration of Clock Monitor
Clock monitor consists of the following hardware.
Control register
• While oscillation stabilization time is being counted after software STOP mode is released
• When the main clock (X1 input clock) is stopped
• When the sampling clock is stopped (Ring-OSC)
• When the CPU operates with Ring-OSC
Item
Ring-OSC clock
X1 input clock
Clock monitor mode register (CLM)
Figure 25-1: Block Diagram of Clock Monitor
Table 25-1: Configuration of Clock Monitor
User’s Manual U16702EE3V2UD00
Chapter 25 Clock Monitor
Clock monitor mode register (CLM)
Enable/disable
Configuration
CLME
Internal reset signal
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