upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 543

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

Caution:
Receiving node detects an error (except bit error in the
active error flag or overload flag).
Receiving node detects dominant level following error flag
of error frame.
Transmitting node transmits an error flag.
[As exceptions, the error counter does not change in the
following cases.]
<1>ACK error is detected in error passive state and domi-
nant level is not detected while the passive error flag is
being output.
<2>A stuff error is detected in an arbitration field that
transmitted a recessive level as a stuff bit, but a dominant
level is detected.
Bit error detection while active error flag or overload flag is
being output (error-active transmitting node)
Bit error detection while active error flag or overload flag is
being output (error-active receiving node)
When the node detects 14 consecutive dominant-level bits
from the beginning of the active error flag or overload flag,
and then subsequently detects 8 consecutive dominant-
level bits.
When the node detects 8 consecutive dominant levels
after a passive error flag
When the transmitting node has completed transmission
without error (±0 if error counter = 0)
When the receiving node has completed reception without
error
(b) Error counter
The error counter counts up when an error has occurred, and counts down upon successful trans-
mission and reception. The error counter is updated during the first bit of the error delimiter.
(c) Occurrence of bit error in intermission
An overload frame is generated.
If an error occurs, it is controlled according to the contents of the transmission error
counter and reception error counter before the error occurred. The value of the error
counter is incremented after the error flag has been output.
State
User’s Manual U16702EE3V2UD00
Chapter 16 FCAN Controller
Table 16-14: Error Counter
No change
No change
+8
+8
No change
+8 (transmitting)
–1
No change
(TEC7 to TEC0)
Error Counter
Transmission
+1 (REPS bit = 0)
+8 (REPS bit = 0)
No change
No change
+8 (REPS bit = 0)
+8 (receiving, REPS bit = 0)
No change
–1 (1 ≤ REC6 to REC0 ≤
127, REPS bit = 0)
±0 (REC6 to REC0 = 0,
REPS bit = 0)
Any value of 119 to 127 is
set (REPS bit = 1)
(REC6 to REC0)
Error Counter
Reception
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